In addition, TSMC unveiled the N6RF and N5A production technologies.
TSMC organises an annual conference once a year to showcase what it has accomplished in the previous year. This year’s TSMC technology symposium was no exception, with the semiconductor maker reporting progress on all process nodes presently under development, including the N6RF, N5A, N4, and N3 nodes.
TSMC’s 4nm chips will be based on the N5 design rules but still offer more performance, power efficiency, and transistor density than its predecessor. Risk production is set for the third quarter of 2021, TSMC said.
The 3nm process node should be unaffected by moving the 4nm trial production date. This node, according to TSMC, will be based on the FinFET transistor design and will deliver up to a 15% speed boost or consume up to 30% less power than the N5 node. In any event, it will increase logic density by up to 70%.
TSMC also unveiled the N5A process node for automotive applications at the technology conference. It will provide the same performance and efficiency as the N5 node while also satisfying the AEC-Q100 Grade 2 standard criteria.
Moreover, TSMC talked about the N6RF, a node based on the 6nm manufacturing process specifically designed for 5G RF and WiFi 6/6E solutions. The prior generation of the RF process node was based on the 16nm node, so expect to see massive improvements over it when using semiconductors based on TSMC’s latest node for RF technology.
Finally, TSMC stated that it will be extending its 3D stacking and packaging technology. When adopting the InFO oS and CoWoS packages later this year, computing applications will profit from wider floor layouts. In terms of mobile applications, the business debuted the InFO B solution, which allows clients to stack DRAM in a small container.
Given all of the projects TSMC has been working on, as well as the anticipated infrastructure development, the company’s development should not be slowing down anytime soon.